Jested Liberec 12th IEEE Symposium on Design and Diagnostics of Electronic Systems
logo ddecs 2009 Liberec
April 15-17, 2009, Liberec, Czech Republic
 
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E-mail: ddecs

 

The proposed topics include but are not limited to:
  • ASIC/FPGA Design
  • Bio-inspired Hardware
  • Design Verification/Validation
  • Formal Methods in System Design
  • Hardware/Software Co-Design
  • IP-based Design
  • Logic Synthesis
  • Physical Design
  • Reconfigurable Computing
  • System-on-a-Chip (SoC)
  • Analog, Mixed-Signal, and RF Design and Test
  • ATE Hardware and Software
  • Built-in Self-Test (BIST)
  • Design for Testability and Diagnosis
  • Defect/Fault Tolerance and Reliability
  • Embedded Test
  • Memory and Processor Test
  • MEMS Testing